1. Technical Field
The present invention relates generally to semiconductor fabrication, and more particularly, to etching processes using octafluorocyclobutane (C4F8) for silicon dioxide (SiO2) and tetrafluoro methane (CF4) for titanium nitride (TiN).
2. Related Art
In the semiconductor industry, reactive ion etching (RIE) is used to open pathways for circuitry within a semiconductor chip. One structure formed using RIE, for example, is a via, which electrically connects conductors within different layers. RIE is a variation of plasma (gas) etching in which a semiconductor wafer is placed on a radio frequency (RF) powered electrode, and etching species are extracted and accelerated from the plasma toward the surface to be etched. A chemical etching reaction occurs that removes parts of the surface. RIE is one of the most common etching techniques in semiconductor manufacturing.
Referring to FIG. 1, a conventional semiconductor structure 10 including layers 12, 14 prior to etching is shown. Structure 10 includes a conductor layer 14 including a dielectric layer 16 (e.g., of silicon dioxide (SiO2)) surrounding a conductor 18 (e.g., of copper (Cu) or aluminum (Al)); a cap layer 20 (e.g., of titanium nitride (TiN)) atop conductor level 14; a dielectric layer 22 (e.g., of silicon dioxide (SiO2)) atop cap layer 20; another dielectric layer 24 (e.g., of silicon nitride Si3N4) atop dielectric layer 22; and a patterned photoresist 26.
A typical RIE process is conducted in a single plasma chamber capable of two RF settings, e.g., approximately 2 MHz (bottom RF source electrode) and approximately 27 MHz (top bias power electrode). One conventional RIE process for a stack having the following thicknesses: 6 μm of photoresist 26 (e.g., Gpoly), 4000 Å of dielectric layer 24 of silicon nitride, 4500 Å of dielectric layer 22 of silicon dioxide and 250-350 Å of cap layer 20 of titanium nitride will now be described. The conventional RIE process may include the following steps: performing a descum, etching dielectric layer 24, etching dielectric layer 22 using argon (Ar), tetrafluoro methane (CF4) and carbon monoxide (CO), and a two step etching of cap layer 20. A first cap layer etching step may use argon (Ar), octafluorocyclobutane (C4F8), oxygen (O2), and trifluoro methane (CHF3), and a second cap layer etching step may use argon (Ar) and nitrogen trifluoride (NF3). Finally, an oxygen (O2) plasma chemistry (ash) is performed to remove residual RIE polymers from conductor 18.
The conventional RIE process for removing TiN in a dielectric etch tool suffers from a number of problems. First, it leads to tool degradation, and more specifically, to a lowered etch rate and a decreased etch uniformity of subsequent RIE processing, which reduces yield. Second, typical plasma processes lead to wafer degradation. For example, the above-described process has exhibited increased electro-static discharge (ESD) defects within kerfs of wafers. One approach to address this situation has been to employ metal etch systems, rather than dielectric etching systems. However, these systems cause defects in the profile of the remaining conductor 18, e.g., of aluminum (Al), under cap layer 20 (titanium nitride). That is, they are not selective to aluminum (Al).
In view of the foregoing, there is a need in the art for an improved RIE process that does not suffer from the problems of the related art.